Bültmann & Gerriets
A Designer¿s Guide to Built-In Self-Test
von Charles E. Stroud
Verlag: Springer US
Reihe: Frontiers in Electronic Testing Nr. 19
Gebundene Ausgabe
ISBN: 978-1-4020-7050-1
Auflage: 2002
Erschienen am 31.05.2002
Sprache: Englisch
Format: 241 mm [H] x 160 mm [B] x 24 mm [T]
Gewicht: 682 Gramm
Umfang: 344 Seiten

Preis: 213,99 €
keine Versandkosten (Inland)


Dieser Titel wird erst bei Bestellung gedruckt. Eintreffen bei uns daher ca. am 12. November.

Der Versand innerhalb der Stadt erfolgt in Regel am gleichen Tag.
Der Versand nach außerhalb dauert mit Post/DHL meistens 1-2 Tage.

klimaneutral
Der Verlag produziert nach eigener Angabe noch nicht klimaneutral bzw. kompensiert die CO2-Emissionen aus der Produktion nicht. Daher übernehmen wir diese Kompensation durch finanzielle Förderung entsprechender Projekte. Mehr Details finden Sie in unserer Klimabilanz.
Inhaltsverzeichnis
Klappentext

An Overview of BIST.- Fault Models, Detection, and Simulation.- Design for Testability.- Test Pattern Generation.- Output Response Analysis.- Manufacturing and System-Level Use of BIST.- Built-In Logic Block Observer.- Pseudo-Exhaustive BIST.- Circular BIST.- Scan-Based BIST.- Non-Intrusive BIST.- BIST for Regular Structures.- BIST for FPGAs and CPLDs.- Applying Digital BIST to Mixed-Signal Systems.- Merging BIST and Concurrent Fault Detection.



A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test (BIST). This idea was first proposed around 1980 and has grown to become one of the most important testing techniques at the current time, as well as for the future. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented since 1980, along with their advantages and limitations. The BIST approaches include the Built-In Logic Block Observer, pseudo-exhaustive BIST techniques, Circular BIST, scan-based BIST, BIST for regular structures, BIST for FPGAs and CPLDs, mixed-signal BIST, and the integration of BIST with concurrent fault detection techniques for on-line testing. Particular attention is paid to system-level use of BIST in order to maximize the benefits of BIST through reduced testing time and cost as well as high diagnostic resolution. The author spent 15 years as a designer at Bell Labs where he designed over 20 production VLSI devices and 3 production circuit boards. Sixteen of the VLSI devices contained BIST of various types for regular structures and general sequential logic, including the first BIST for Random Access Memories (RAMs), the first completely self-testing integrated circuit, and the first BIST for mixed-signal systems at Bell Labs. He has spent the past 10 years in academia where his research and development continues to focus on BIST, including the first BIST for FPGAs and CPLDs along with continued work in the area of BIST for general sequential logic and mixed-signal systems. He holds 10 US patents (with 5 more pending) for various types of BIST approaches. Therefore, the author brings a unique blend of knowledge and experience to this practical guide for designers, test engineers, product engineers, system diagnosticians, and managers.


andere Formate
weitere Titel der Reihe