INTRODUCTION
Asynchronous design and its advantages
Disadvantages of asynchronous design
Book overview
Publications
ASYNCHRONOUS DESIGN
Introduction
Asynchronous design
Summary
SYSTEM LEVEL INTERCONNECT PRINCIPLES
Point-to-point communication paths
Multipoint interconnect topology
Bus protocol issues
Interconnect performance objectives
Commercial on-chip buses
Summary
THE PHYSICAL (WIRE) LAYER
Wire theory
Electrical and physical characteristics
Termination
Crosstalk
Summary
THE LINK LAYER
Centralised vs distributed interfaces
Signalling convention
Data encoding
Handshake sources
Bidirectional data transfer
Multiple initiators on one channel
Multiple targets
Multipoint bus-channel interfaces
MARBLE's link layer channels
Summary
PROTOCOL LAYER
Transfer phases
Exceptions
Defer and bridging
Mapping transfer phases onto channel cycles
Transfer cycle routing
Transfer cycle initiation
MARBLE's dual channel bus architecture
TRANSACTION LAYER
Split transactions
Response ordering
MARBLE's transaction layer
MARBLE: A DUAL CHANNEL SPLIT TRANSFER BUS
MARBLE protocol and signal summary
Bus transaction interface implementation
MARBLE in the AMULET3H system
Summary
EVALUATION
The MARBLE testbed
Simulation of MARBLE in AMULET3H
Analysis of delay distribution
Hardware requirements
Comparison with synchronous alternatives
CONCLUSION
Advantages and disadvantages of MARBLE
Improving the MARBLE bus
Alternative interconnect solutions and future work
The future of asynchronous SoC interconnect?
APPENDIX A: MARBLE SCHEMATICS
REFERENCES
INDEX

Asynchronous System-on-Chip Interconnect describes the use of an entirely asynchronous system-bus for the modular construction of integrated circuits. Industry is just awakening to the benefits of asynchronous design in avoiding the problems of clock-skew and multiple clock-domains, an din parallel with this is coming to grips with Intellectual Property (IP) based design flows which emphasise the need for a flexible interconnect strategy. In this book, John Bainbridge investigates the design of an asynchronous on-chip interconnect, looking at all the stages of the design from the choice of wiring layout, through asynchronous signalling protocols to the higher level problems involved in supporting split transactions. The MARBLE bus (the first asynchronous SoC bus) used in a commercial demonstrator chip containing a mixture of asynchronous and synchronous macrocells is used as a concrete example throughout the book.